USB has evolved from a data interface that can provide limited power to a main power supply with a high-speed data interface. USB Type-C ™ And USB Power Delivery (PD) 2.0 (and the imminent 3.0 version) have accelerated this development. However, it is important to choose the most cost-effective solution for the application, as USB Type-C and USB PD provide multiple power levels.

For example, USB Type-C alone can support up to 5 volts at 3 amperes (15 watts), while USB Type-C with USB PD allows the ecosystem to support up to 20 volts at 5 amperes (100 watts). The disadvantage is that USB PD increases design complexity and the cost of Bill of Materials (BOM).

Fortunately, by using a series of recently launched components, designers can leverage new features such as reversible power transfer, power negotiation, and 100 watt power transfer to design USB power supplies that can safely and quickly charge devices (even laptops).

This article attempts to explain how designers use USB Type-C in many applications and when they should migrate to USB PD for higher power applications through USB Type-C and USB PD. Then, this article will provide guidance on how to implement practical USB Type-C and USB PD designs.

USB becomes more focused

To demonstrate a certain degree of foresight, the original designer interface of USB decided that it should carry data and power, allowing low-power peripherals to obtain power from the host. Nowadays, billions of electronic devices use USB connections, and this technology far exceeds the originally expected range of computer peripherals.

The adverse factor of this significant growth is the type of complexity increase brought about by the increase in the number of connectors, with bandwidth and power level ranging from the initial 5 volts, 100 milliamperes to 20 volts, 5 amperes.

Fortunately, things have become more focused, and new designs tend to choose highly flexible USB Type-C specifications 1.0, 2.0, 3.0, or 3.1 communication protocols; If higher power is required, USB PD 2.0/3.0 power protocol. This article will consider designs using these technologies.

USB Type-C and battery charging 1.1 and 1.2

The USB Type-C specification 1.0 was launched at the end of 2014 to meet the requirements for compact reversible plug connectors suitable for both hosts and peripheral devices (Figure 1). This future sample extension includes a 24 pin connector, providing four+5 V& amp; amp; amp; Ground pair, two differential pairs of USB 2.0 data bus, four pairs of SuperSpeed data bus, two sideband pins, VCONN+5V power supply for active cable, and channel configuration (CC) pin cable orientation detection and connection management applicable in this article. The pins used in a specific application depend on the communication protocol and power transmission requirements used.

Figure 1: USB Type-C connector pins. CC1 and CC2 are used for discovering, configuring, and managing USB Type-C cable connections. Please note how the pin layout allows for reversibility. （Image source:STMicroelectronics）

With the proliferation of portable devices, it is evident that the 500 mW provided by the original version of USB is insufficient to power (and charge) future portable devices. Therefore, USB 2.0 introduces a maximum current of 500 mA (increasing power to 2.5 W), while USB 3.0 pushes the current up to 900 mA (4.5 W).

On the other hand, the continuous growth of smartphone capacity and the increasing use of tablets and USB for charging have triggered the release of dedicated battery charging protocols. USB Battery Charging (BC) 1.1, followed by 1.2, is an engineering change to USB 2.0 in 2010.

The intelligence of USB BC lies in its recognition that battery charging is an important application of USB. For example, in the past, it was not possible to charge the battery of a closed peripheral device. In addition, even if the device is powered on, if the USB port does not receive data from the peripheral within the specified time, it can still be set to the "pause" mode, with a maximum allowable current of only 2.5 mA

The USB BC specification outlines three different types of USB ports: Standard Downlink Port (SDP); Dedicated charging port (DCP); And charging downstream port (CDP) (Figure 2).

Figure 2: The USB Battery Charging (BC) specification defines three port types: Standard Downstream Port (SDP), Dedicated Charging Port (DCP), and Charging Downstream Port (CDP). (Image source: Maxim Integrated)

SDP has a 15k Ω pull-down resistor on both the D+and D-lines. The current limit for 'suspended' is 2.5 mA, 100 mA when connected, and 500 mA when connected, configured as' higher power '(defined by the USB 2.0 specification). As the name suggests, DCP cannot support any data transmission, but can provide up to 1.5 amperes of current for a 7.5 watt power output. In this configuration, the D+and D - lines are short circuited. CDP allows for high current charging and data transmission, fully compliant with USB 2.0. This port has a 15k Ω pull-down resistor for D+and D - communication, as well as an internal circuit to switch during the charger detection phase. This internal circuit allows portable devices to distinguish between CDP and other port types.

All portable devices need to do is identify the voltage set by DCP on D+or D - and observe the voltage of another line to determine a short circuit in the line.

Increase power supply

USB BC 1.1 has done a great job in extending USB to battery charging, with version 1.2 adding a maximum of 5 volts at an output of 5 amps (25 W) - enough to charge a typical smartphone for about an hour. But the challenge for designers is to expand it to products with larger batteries, such as tablets and laptops.

In order to meet this demand, the USB Implementers Forum (USB-IF) launched USB Power Supply (PD) 1.0. The key driver for introducing the standard is to reduce Electronic waste by providing an interoperable charging standard, which allows manufacturers to provide a charger that can power a set of portable devices.

Key features of USB PD 1.0 include a maximum of 20 volts, 5 amperes (100 watts) (subject to international safety requirements); Compatible with existing USB 2.0/3.0 cables and connectors up to 7.5 watts (otherwise cables need to be upgraded); Coexistence with USB BC 1.2.

Although USB PD 1.0 can provide up to 100 watts of power, it also provides several other "power configuration files"; But these were largely ignored by manufacturers and were removed from USB PD 2.0 and adopted as part of USB 3.1. Now the USB PD "power rules" have replaced the power configuration file, defining four voltage levels of 5V, 9V, 15V, and 20V. The power supply can support any maximum source output power of 0.5 to 100 watts, instead of six fixed levels. Provide power supplies exceeding 15 watts to provide voltages of 5 and 9 volts, power supplies exceeding 27 watts to provide voltages of 5,9 and 15 volts, and power supplies exceeding 45 watts to provide voltages of 5,9,15 and 20 volts.

The current can vary continuously (up to 5 A), depending on the required power level. In addition, at any given power level, a source is required to support all lower voltages and power levels to ensure that higher power sources can support lower power devices (Figure 3).

Figure 3: USB PD 3.0 provides four voltage levels (5,9,15, and 20 V) and a maximum current of 5 amperes, achieving power output of up to 100 watts. (Photo source: Texas Instruments)

USB PD 3.0 has introduced some improvements to enhance system power transmission and robustness, but no changes have been made to Power Rules. USB PD 2.0 and 3.0 are fully interoperable and backwards compatible (Table 1).

Specifications Maximum voltage Maximum current Maximum power USB 2.0 5 V 500 mA 2.5 W USB 3.0 and USB 3.1 5 V 900 mA 4.5 W USB BC 1.2 5 V 1.5 A 7.5 W USB Type-C 1.2 5 V 3 A 15 W USB PD 3.0 20 V 5 A 100 W

Table 1: With the introduction of Battery Charging (BC) and Type-C, the maximum USB current increases and the Power Transmission (PD) specifications. (Photo source: Texas Instruments)

For designers, other noteworthy aspects of the USB PD specification are the ability of hosts and peripherals to "negotiate" voltage and current levels using VBUS pins (i.e., not relying on data cables), as well as the ability to provide power to either direction without the need for connector switching. For example, this capability allows a monitor connected to the main power supply to charge a laptop while presenting information from the laptop. Finally, the ability of various devices to negotiate the required power at any time can improve system efficiency.

USB powered design

When considering adopting a USB based design, it is worth taking some time to understand how it handles data and power transmission in terms of most of the power supply capabilities of the technology. This has undergone significant changes from the initial implementation, where PCs provide power to peripheral devices and bidirectional data exchange.

In today's implementation, the downstream port (DFP) sends data, which can obtain VBUS power and is usually a host or hub; The upstream port (UFP) receives data, absorbs (consumes) VBUS power, and connects to the host (such as a display); And the Dual Role Data (DRD) port can serve as a DFP or UFP. For DRD, the role of the port depends on whether it serves as a power supply (DFP) or a receiver (UFP) during startup, but its functionality can be dynamically changed during operation if needed. The DRD port is typically used for smartphones or tablets.

When considering power flow, the port can also adopt a dual role power (DRP) configuration. For example, a portable computer may have a DRP port for charging its battery, but it can later be used to power external devices such as hard drives. For designers, life has become a bit complicated because there are subcategories of DRP, namely purchasing equipment and sinking hosts. The purchased equipment can provide power, but cannot serve as the DFP Advertising management system. Similarly, sinking devices can receive power, but cannot serve as UFPs.

Although other USB connectors are still popular, many new designs tend to lean towards Type-C because of its long-term advantages. Similarly, new designs typically use USB 2.0 or 3.0.

The USB Type-C (1.2) without a USB PD provides a healthy maximum of 5 volts at 3 amperes (15 watts), making it suitable for wide screen applications that do not increase the complexity of USB PDs. For example, 15 watts is enough to charge a smartphone battery in 30 minutes, or a tablet in 2.5 hours. Also available in a 5 volt, 1.5 ampere (7.5 W) version.

USB Type-C uses Pull-up resistor (for DFP) and pull-down resistor (UFP) on pins CC1 and CC2. The Pull-up resistor (Rp) determines the current supply capacity of DFP. The fixed value pull-down resistor (Rd) on the UFP and Rp form a voltage divider. By detecting the voltage at the center tap of the voltage divider, UFP can detect the advertising current of DFP (Figure 4).

Figure 4: The pull-up and pull-down resistors on DFP and UFP monitors are used for connection and direction, while the resistors on UFP can also detect the current advertisement published by DFP. (Photo source: Texas Instruments)

If both ports support DRP, the connection result may be affected by two optional features: "Try. SRC" (set port to DFP) and "Try. SNK" (UFP). Depending on the application, these settings may be very important. For example, it is meaningless for smartphones to start charging laptops.

Texas Instruments's TUSB320 chip is a good foundation for the implementation of USB Type-C USB 2.0. It is also a quick way to upgrade the traditional connector USB 2.0 design to USB Type-C. The DFP implementation using TI chips is shown in Figure 5. The ID signal represents the standard mobile implementation when the port is configured as DRP. Although the DFP Advertising management system is not absolutely necessary, it can easily control the power switch (FET).

Figure 6 shows a UFP implementation using the same chip. The chip can be configured using GPIO or (optional) I 2C input and allows for other designer friendly functions.

图5

Figure 6

Figure 5& 6: USB Type-C USB 2.0 DFP (Figure 5) and UFP implementation using TI TUSB320 chip (Figure 6). (Using Digi Key Scheme it) ® Chart drawn from Texas Instruments's original source image)

Add USB PD

Products that require more power than standard USB Type-C ports to charge their batteries (such as laptops) will require resources from USB PDs. This technology allows peripherals to negotiate higher currents and/or higher or lower voltages than defined in the USB 2.0/3.0/3.1 specification through USB cables. Communicate through USB Type-C CC cable. The downside is that USB PDs add complexity and cost to the design, so they can only be specified when strict requirements exceed USB Type-C 5 volt 3 ampere power support.

Especially compared to the aforementioned USB Type-C USB 2.0 implementation, PD requires four new components. In addition, it is necessary to upgrade the VBUS power switch with a more powerful FET to handle voltages up to 20 volts and 5 amperes.

Higher power FETs require gate drivers. Some designers prefer to use gate drivers with integrated high-power FETs, which can then drive higher power external FETs. However, due to the higher pin density of the USB Type-C connector compared to traditional USB devices, the risk of shorting VBUS to adjacent pins is higher. This is a more serious danger when the system carries higher voltage and current from USB PDs.

Therefore, adding short-circuit protection to avoid catastrophic failures is a good design practice. Some chip suppliers provide single chip solutions for this task to save time in designing protective circuits.

PD PHY and PD Manager

Perhaps the most important addition in design is the combination of USB PD, PD PHY, and PD Manager. These devices manage communication on the CC line between DFP and UFP together. Through this communication, the DFP Advertising management system can advertise the power level it can support, and then allow the UFP to request the supported power level to meet its needs. Once the success rate level is reached, the voltage and current levels will be adjusted. Figure 7 shows the upgrade and addition elements required to enable USB Type-C USB 2.0 design for USB PD operation.

Figure 7: The USB Type-C USB 2.0 implementation requires additional highlighted elements (blue blocks) to enable USB PD operations. (Image source: Texas Instruments)

The PD manager and PD PHY perform different tasks: PD PHY drives communication across CC lines, but it is itself a "dumb" device. In contrast, the PD manager is an "intelligent" device composed of complex state machines that support PD negotiation and drive PD PHY by instructing them to execute advertisements, request and confirm power levels, and other functions. The subtle differences in these functions are complex and beyond the scope of this article. It can be said that USB PD implementation always requires a PD manager and PD PHY.

Silicon suppliers provide solutions that separate PD managers and PD PHYs, or combine these two functions onto a single chip. For example, TI provides TPS25740, which is a source controller that includes gate drivers for VBUS power switches, CC logic, USB PD managers, and PD PHYs. This chip complies with the USB PD 2.0 standard, providing voltages of 5, 12, and 20 volts, as well as a power output of 15 to 100 watts.

TPS25740 is a suitable foundation for DFP Advertising management system solution. It will automatically handle the discharge of VBUS output. The protection functions include overvoltage, overcurrent, over temperature system coverage to disable the gate driver.

TI TPS65982 adopts a higher level of integration. In addition to integrating a USB PD manager and USB PD PHY, the chip can also control external high current power switches and multiplex high-speed data to USB 2.0 and backup mode sideband information ports. The mixed signal front end on the CC pin notifies a USB Type-C power supply with a default value of 1.5 or 3 amps, detects a plug event, determines the direction of the USB Type-C cable, and automatically negotiates the USB PD power level. TPS65982 can run as DFP, UFP, or DRP.

The same highly integrated solution comes from Cypress Semiconductor and its CYPD2103 EZ-PD CCG2 port controller. The chip uses an ARM M0 processor and 32 KB flash memory, providing not only a USB PD manager and PD PHY, but also an integrated USB Type-C port controller and terminal resistor. The chip can be powered by 2.7 to 5.5 volts and can be used with passive cables, active cables, and power accessories.

Like TI's TPS65982, CYPD2103 can be designed with DFP, UFP, and DRP topologies. You can also use the CY4541 evaluation kit to modify and configure the USB Type-C DRP application for laptops. Figure 8 shows the USB Type-C and USB PD specification compliant firmware stack and application firmware of the CCG2/3/4 controller provided with EVK.

Figure 8: Cypress Semiconductor's CY4541 evaluation suite includes USB Type-C and USB PD compatible firmware stacks. (Source: Cypress Semiconductor.)

conclusion

In sync with the development of data communication technology that provides increasing bandwidth, USB technology has evolved to meet the demand for more power processing capabilities.

Especially the USB Type-C has reversible connectors and greater flexibility, as well as the USB PD power protocol, which can provide power levels to meet the needs of future portable devices. For products that require high power input to reduce charging time, developers can use this feature.

The USB Type-C with USB 2.0 has a maximum power of 15 watts and a bandwidth of 480 Mbit/second. It is suitable for a wide range of applications, relatively simple to implement, and minimizes component costs. For higher power applications, USB PDs can be added to new or existing designs to increase the maximum power to 100 watts. Using USB PD for design is more complex, but it can be achieved by combining the power supply based on an integrated USB Type-C controller with a USB PD PHY/management chip. Please note that the supplier also provides a series of development tools specifically designed to help engineers accelerate the design process.

Source:http://www.gjytype.cn/news/xydt/2019/0301/594.html